Analog Layout
Tessolve ·
Role Overview We are looking for an experienced Analog / Mixed-Signal IC Layout Engineer with 8–12 years of hands-on experience in IC layout. The ideal candidate should be capable of independently executing block-level layouts from floor planning through tapeout handoff, while working closely with circuit designers and other layout engineers.
Key Responsibilities Independently execute block-level Analog/Mixed-Signal IC Layout with minimal supervision. Own the complete layout cycle from floor planning, placement, routing, optimization, physical verification, and tapeout handoff.
Work closely with Analog/Mixed-Signal Circuit Designers to understand circuit requirements and translate them into robust physical layouts. Perform layout optimization considering matching, symmetry, common-centroid, shielding, routing, parasitics, and noise isolation requirements.
Perform and debug physical verification including DRC, LVS and related verification checks. Identify and resolve layout-related issues in collaboration with circuit designers. Ensure layouts meet design rules, reliability, performance, and tapeout requirements.
Contribute to improving layout quality, methodology, and productivity. Effectively collaborate with cross-functional teams and communicate layout status, challenges, and risks. Required Skills Experience 8–12 years of hands-on experience in Analog/Mixed-Signal IC Layout.
Strong experience in block-level layout execution from floor planning to tapeout handoff. Experience working on technology nodes such as: 130nm, 90nm, 65nm 180nm Strong proficiency in Calibre and Assura physical verification tools.
Good understanding of DRC, LVS and layout verification/debugging. Strong knowledge of Analog/Mixed-Signal layout practices, including: Matching and symmetry, Common-centroid layout Interdigitated structure Ability to work independently and take ownership of assigned layout blocks.
Strong problem-solving and debugging skills. Good communication and interpersonal skills. Ability to drive and collaborate effectively with layout engineers and circuit designers. Good to Have Experience with multiple Analog/Mixed-Signal IPs such as PLL, ADC/DAC, LDO, Bandgap, SerDes, PMIC, and other analog blocks.
Experience in full-chip integration and top-level layout. Exposure to advanced physical verification and tapeout flows. Experience working in a customer-facing or project-based semiconductor engineering environment.