Staff Digital Design Engineer

About Analog DevicesAnalog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers.

With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on LinkedIn and X.Staff Digital Design Engineer, Data Center & Energy, IVR TechnologyAbout the Role As a Staff Digital Design Engineer, you will drive technical strategy and innovation for complex digital systems, including System on Chips (SoCs).

This position requires exceptional expertise across multiple domains and the ability to influence business direction while mentoring and developing technical talent. Role OverviewOur power management ICs and next-gen products are driven by complex digital controllers.

To expand our new design center in Munich we are seeking an experienced Principal Digital Design Engineer capable to lead digital RTL development of control logic for cutting-end PMICs and analog/mixed-signal ICs in FinFast technology.

You’ll define the digital architecture of our products, including embedded cores, NVMs/memories, proprietary and/or standard multi-bus systems, interfaces, multi-domain clock-trees. You will work closely with our analog, layout, firmware and verification international teams to develop ultra-compact, ultra-efficient digital controllers and contribute to top-level chip architecture.

Key ResponsibilitiesJoin the design team to define the top-level requirements of the digital functions and develop specificationsDrive, design, implement and integrate digital blocks for power management ICs, including:Digital control loops (synchronous and asynchronous)State machines, multi-bus systems, embedded-cores, clock-treesRegulators and timing logicSelf-Calibration and trimming logicCommunication interfaces (e.g., PMBus, AVSbus, I2C/SPI, PCMI)Own and write synthesizable RTL with high reliability and efficiency.

Work with AMS/DV teams to integrate digital RTL and gate-level netlists in mixed-signal/DV simulation environments. Own and execute synthesis, linting, CDC/STA checks, and backend/P&R support as needed. Qualifications:B.S. or M.S. in Electrical or Computer Engineering.

Typically 10-12 years of digital design experience in silicon-proven ICs.Solid experience in RTL design, finite state machines, and digital architectures for embedded/mixed-signal applications. Basic understanding of analog and full custom circuit designExperience with synthesis tools (Synopsys, Cadence) and flow setup.

Familiarity with digital design flow including RTL simulation, logic synthesis, timing constraints, STA, back annotation of parasitic, gate level simulation, equivalence checkingExcellent debugging skills and understanding of simulation tools (Xcelium)Experience with asynchronous digital design and/or embedded-cores is a plus#LI-EC1For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S.

Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C.

1324b(a)(3) – may have to go through an export licensing review process. Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysSummaryLocation: Germany, Munich, SeidlstrType: Full time

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