Sr. System Design Engineer
1460 Micron Semiconductor Ital · Arzano, Campania ·
Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
Department Introduction Join our team to contribute to the architecture, development, and validation of advanced FPGA-based platforms for next-generation SSD and storage technologies. Our team designs, prototypes, and validates high-performance FPGA systems used to emulate infrastructure components and enable the testing and characterization of advanced storage devices.
We work across the complete system development lifecycle, from architecture definition and FPGA system integration to lab bring‑up, protocol debugging, and system‑level validation. Our platforms integrate high‑speed interfaces, embedded processing, firmware, software, and custom FPGA functionality to enable advanced storage validation and testing.
This role offers the opportunity to work closely with firmware, silicon, validation, and product engineering teams, contributing directly to the development and validation of next‑generation storage technologies.
Position Overview
We are looking for an experienced FPGA Systems Engineer with strong expertise in system architecture, PCIe, NVMe, UFS, and FPGA‑based platforms. The ideal candidate has proven experience in the architecture, design, integration, and validation of complex FPGA‑based systems, with a strong understanding of how hardware, firmware, software, storage protocols, and high‑speed interfaces interact at system level.
The primary focus of this role is system design and integration rather than pure RTL development. The engineer will define FPGA‑based architectures for advanced SSD and storage validation platforms, integrate existing and custom IP components, and drive the system from concept through implementation, bring‑up, debugging, and validation.
The candidate is expected to have strong hands‑on knowledge of PCIe, NVMe, and UFS protocols, together with the ability to analyze and debug complex interactions across FPGA hardware, firmware, host software, and storage devices.
Responsibilities
- Define and develop system architectures for FPGA‑based SSD and storage validation platforms, translating product and validation requirements into system‑level architectures, interfaces, functional blocks, and implementation strategies.
- Architect, integrate, and configure complex FPGA subsystems, including PCIe, DMA, memory, embedded processors, high‑speed interfaces, control, monitoring, and debug functionality, developing or adapting RTL where required by the system design.
- Drive system‑level integration, bring‑up, validation, and root‑cause analysis across FPGA hardware, embedded firmware, host software, storage devices, and PCIe, NVMe, and UFS protocols.
- Perform system and protocol‑level debugging using FPGA embedded instrumentation, protocol analyzers, oscilloscopes, logic analyzers, and other lab equipment.
- Collaborate with firmware, silicon, validation, and product engineering teams to define system requirements, interfaces, architectures, validation strategies, and develop technical documentation.
- Integrates AI assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and aligning with organizational standards.
Minimum Qualifications
- Master’s degree or equivalent experience in Electronic Engineering, Computer Engineering, or a related field.
- Proven experience in the architecture, development, integration, and validation of complex hardware platforms using programmable logic devices.
- Solid knowledge of Verilog/SystemVerilog and FPGA digital design, combined with hands‑on experience in system bring‑up and the ability to independently fix complex issues spanning FPGA hardware, embedded firmware, software, protocols, and storage devices complete the profile.
- Strong system architecture and system engineering skills, with demonstrated ability to translate requirements into integrated hardware, firmware, software, and FPGA solutions.
- Proven hands‑on knowledge and experience with PCIe, NVMe, and UFS protocols and storage architectures, including system integration, protocol operation, host/device interactions, and protocol‑level debugging.
- Experience integrating and debugging FPGA subsystems such as PCIe, DMA, memory controllers, embedded processors, and high‑speed interfaces, using FPGA development platforms and tools such as AMD Vivado, Zynq, Versal, or equivalent technologies.
- Strong English communication skills are required.
Preferred Qualifications
- Advanced experience with PCIe Gen4/Gen5/Gen6, NVMe SSD architectures, and UFS‑based storage systems, including integration, validation, and protocol‑level debugging.
- Experience designing or developing SSD/storage validation platforms, traffic generators, protocol analyzers, emulators, or similar FPGA‑based systems.
- Experience with advanced FPGA/SoC architectures such as AMD Zynq UltraScale+ and Versal, including embedded processors and hardware/firmware partitioning.
- Experience with FPGA verification methodologies, including SystemVerilog testbenches, assertions, functional coverage, waveform debugging, and UVM.
- Programming experience with Python and C/C++ for automation, embedded development, test infrastructure, or system debugging.
The base salary range that Micron estimates it could pay in for this position full‑time is: 40.000,00 € - 69.000,00 € per year, with B3 CCNL Level. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position.
Within the range, individual pay is determined by work location and additional job‑related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for the position.
- In addition to base pay, the remuneration package also includes: eligibility for a variable plan subject to the personal achievement of objectives and the company’s performance, and benefits, which -at the discretion of the company- currently include meal vouchers, corporate welfare, yearly allowance of remote working days, supplementary health insurance, life coverage, Employee Assistance Program.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
Remuneration is determined by objective criteria, regardless of gender and of any other factor protected by applicable federal, state, or local laws.
To request assistance with the application process and/or for reasonable accommodations, please contact.
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
Dati di mercato di EasyWorkClub, non forniti dal datore di lavoro
Stesso ruolo entro 50 km
- Technical Product Engineer for Smart Water Meters · Giugliano · 6 km
- Technical Product Engineer – Smart Water Meters (Contatori Idrici Intelligenti) · Giugliano · 6 km
- Product Engineer · Napoli · 6 km
- ERTMS Functional Design Engineer — Signalling & V&V · Napoli · 6 km
Lavoro da remoto o da casa nel 20% di 435 annunci per Ingegnere progettista che pubblichiamo a livello nazionale
Altre offerte di 1460 Micron Semiconductor Ital
9 altri annunci che pubblichiamo
- Design / DFT Director (NVE Engineering) · L'Aquila
- Design / DFT Director (NVE Engineering) · Avezzano
- NAND DFT Director: AI-Driven Test Architecture · L'Aquila
- Senior Design Engineer – NAND Test (NVE Engineering) · L'Aquila
- NAND Analog Design Engineer — AI-Driven, Remote Options · Avezzano