Senior Verification Engineer

Intellectual Capital Resources · Southampton, England ·

Last confirmed by our partners on 24 Oct 2026.

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Location: UK | Semiconductor / Wireless Communications An innovative semiconductor technology company developing high-performance solutions for next-generation wireless and satellite communications is looking for a Senior Verification Engineer to join its growing engineering team.

The company develops advanced communications IP for both terrestrial and non-terrestrial networks, with its RTL team responsible for delivering efficient ASIC and FPGA implementations of complex communications algorithms.

This position will take responsibility for the UVM verification of advanced digital IP and modem subsystems, working closely with RTL, architecture and wider engineering teams through to FPGA deployment and ASIC tape-out.

You will be responsible for verifying complex RTL implementations, ensuring designs meet functional, performance and quality requirements. Responsibilities will include: Developing verification plans from architecture and design specifications Creating and maintaining SystemVerilog/UVM verification environments Developing testbenches, assertions, scoreboards and functional coverage models Running directed and constrained-random verification Driving coverage analysis and closure Debugging complex RTL and verification issues Supporting IP, subsystem and system-level integration Contributing to regression, automation and CI workflows Participating in design reviews and verification sign-off Mentoring and supporting more junior engineers Using AI-assisted approaches to improve verification productivity while maintaining quality Experience Required 3+ years of experience verifying digital ASIC and/or FPGA designs Strong SystemVerilog and UVM experience Good understanding of RTL design and digital hardware principles Experience with coverage-driven and assertion-based verification Strong debugging and problem-solving skills Linux experience alongside scripting skills in Python, Tcl and/or Bash Experience working collaboratively across RTL, architecture and verification teams Degree in Electronic Engineering, Computer Engineering or a related discipline Desirable Experience Experience in any of the following would be particularly relevant: 4G / 5G Non-Terrestrial Networks (NTN) Satellite communications DSP / signal-processing systems Modem architectures and Layer 1 processing Formal Verification FPGA prototyping Continuous Integration environments MATLAB or similar modelling tools This is an excellent opportunity for a Verification Engineer who wants to work on technically challenging ASIC/FPGA IP at the forefront of next-generation wireless and satellite communications. Please contact Rachel Mason for more details.

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